I am currently a Postdoctoral Research Fellow in the ASSET (Automated System SEcuriTy) Research Group at the Singapore University of Technology and Design (SUTD), where I work on safety and performance validation of robotic systems. The project I am involved in is financed by the Singapore Agency for Science Technology and Research (A*Star), under the National Robotics Programme. I also collaborate with the ESD (Electronic Systems Design) Research Group of the University of Verona, working on the automatic generation of virtual prototypes for heterogeneous embedded systems.

Before joining SUTD I was a Postdoctoral Researcher at the department of Computer Science of University of Verona for two years. My research in Verona was focused on the definition of automatic integration and code generation techniques to build custom virtual platforms for smart devices.

I achieved my Ph.D. in Computer Science at the University of Verona in 2016, under the supervision of Prof. Franco Fummi. My Ph.D. thesis defined a unified approach to deal with the integration of heterogeneous components for smart systems design. In 2012, I received my Master’s degree (M.Sc.) in Computer Science and Engineering with a thesis on modelling languages for heterogeneous embedded systems, supervised by Prof. Fummi. I received my Bachelor’s degree (B.Sc.) in Computer Science at the University of Verona in 2010. To fulfill the degree requirements, I completed a thesis on timed-constraints embedded systems under the supervision of Prof. Graziano Pravadelli.

During my Bachelor’s degree a year at the ESLab (Embedded Systems Laboratory) of the Linköping University (Sweden), where I was introduced to research, while developing part of my bachelor thesis under the supervision of Prof. Zebo Peng.

In 2015, I spent eight months of my last year of Ph.D. at the department of Electrical Engineering and Computer Science Department of the University of California, Berkeley. There, I carried on my research in the Donald O. Pederson Center for Electronic Design under the supervision of Prof. Alberto Sangiovanni-Vincentelli and Dr. Pierluigi Nuzzo. With them I focused on platform-based design with contracts for heterogeneous systems design. Furthermore, we developed the first implementation of CHASE: a requirements engineering tool based on the Assume-Guarantee Contracts theory.